AS5835-54X - Troubleshoot switch port link problems Follow
Purpose :
This article describes how to troubleshoot the switch ports cannot link up problems.
Model :
AS5835-54X
Procedure :
Step-1 Please make sure your network cable is good first
Step-2 Please power cycle the switch and boot into the ACCTON-DIAG for troubleshooting
Step-3 Execute the command to set port speed
Set the port speed to 10G and 100G on the uplink ports.
root@(none):/# swutil -C -r 10G-100G
switch config mode: 10G-100G
If you want to test with port speeds 10G and 40G, please execute the "swutil -C -r 10G-40G".
Step-4 Setup the environment for specific ports
For example:
- Use a pair of 10G transceivers to connect port1 and port2.
- Use a pair of 100G transceivers to connect port49 and port50.
Step-5 Execute the command to check the port status
Basically, plugging those cables and transceivers does not require additional settings, the ports will link up directly if everything is properly.
The port mapping as below :
- xe0~xe47 is physical port1~port48
- ce0~ce5 is physical port49~port54
root@(none):/# swutil ps
ena/ speed/ link auto STP lrn inter max cut loop
port link Lns duplex scan neg? state pause discrd ops face frame thru? back encap
xe0( 1) up 1 10G FD SW No Forward TX RX None FA XFI 9412 No IEEE
xe1( 2) up 1 10G FD SW No Forward TX RX None FA XFI 9412 No IEEE
xe2( 3) down 1 10G FD SW No Forward TX RX None FA XFI 9412 No IEEE
xe3( 4) down 1 10G FD SW No Forward TX RX None FA XFI 9412 No IEEE
xe4( 5) down 1 10G FD SW No Forward TX RX None FA XFI 9412 No IEEE
xe5( 6) down 1 10G FD SW No Forward TX RX None FA XFI 9412 No IEEE
<omit>
ce0( 27) up 4 100G FD SW No Forward TX RX None FA CAUI4 9412 No IEEE
ce1( 25) up 4 100G FD SW No Forward TX RX None FA CAUI4 9412 No IEEE
ce2( 26) down 4 100G FD SW No Forward TX RX None FA CAUI4 9412 No IEEE
ce3( 35) down 4 100G FD SW No Forward TX RX None FA CAUI4 9412 No IEEE
ce4( 34) down 4 100G FD SW No Forward TX RX None FA CAUI4 9412 No IEEE
<omit>
- If the fiber port still CANNOT link up, please refer to step-6 for debugging.
Step-6 Check the fiber port
There are four items that need to be checked here.
- Dump the EEPROM of the transceiver
Please use the command "trcv-dev [Port number] eeprom" to dump the transceiver's EEPROM according to the port you used.
*AS5835-54X has a total of 54 fiber ports, the [Port number] starts from 0 to 53.
*Please make sure the switch can read EEPROM information properly.
root@(none):/# trcv-dev 0 eeprom
Check the "pre-emphasis" and "link training"
0 1 2 3 4 5 6 7 8 9 a b c d e f 0123456789abcdef
00: 03 04 07 10 00 00 00 00 00 00 00 06 67 00 00 00 ????.......?g...
10: 08 03 00 1e 45 64 67 65 63 6f 72 65 20 20 20 20 ??.?Edgecore
20: 20 20 20 20 00 70 72 cf 45 54 35 34 30 32 2d 53 .pr?ET5402-S
30: 52 20 20 20 20 20 20 20 30 31 20 20 03 52 00 8f R 01 ?R.?
40: 00 1a 00 00 4a 31 31 38 30 35 30 30 30 33 38 35 .?..J11805000385
50: 20 20 20 20 31 38 30 32 30 32 20 20 68 f0 03 db 180202 h???
60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
If you are using optical transceiver or AOC cable, then there is no additional settings are required here. By default, our DIAG already loaded the "pre-emphasis" accordingly.
If you are using the DAC cable, please refer to the following command for enabling the "link training" function.
root@(none):/# swutil port xe0-xe47 sp=10000 if=cr
root@(none):/# swutil phy control xe LT=1
Current PHY control settings of xe0 ->
Preemphasis = 0x1b4405
DriverCurrent = 0xffffffff
DFE ENable = True
LP DFE ENable = False
BR DFE ENable = False
LinkTraining Enable = True
Interface = 0xd
CL74 = False
CL91 = True
CL108 = False
root@(none):/# swutil phy control ce LT=1
Current PHY control settings of ce0 ->
Preemphasis = 0x194605
DriverCurrent = 0xffffffff
DFE ENable = True
LP DFE ENable = True
BR DFE ENable = False
LinkTraining Enable = True
Interface = 0x3e
CL74 = False
CL91 = True
CL108 = False - Regarding the SFP+ 10G port, please check the "TX_disable" setting. (By default is enabled.)
Use the command "trcv-dev 0-47 txdis" to check the current setting.
* "yes" means enabled and it will disable the transmitter of the transceiver.
root@(none):/# trcv-dev 0-47 txdis
* "no" means disabled, and it will enable the transmitter of the transceiver.
SFP_1[0]: yes
SFP_2[1]: yes
SFP_3[2]: yes
SFP_4[3]: yes
SFP_5[4]: yes
SFP_6[5]: yes
SFP_7[6]: yes
SFP_8[7]: yes
SFP_9[8]: yes
SFP_10[9]: yes
SFP_11[10]: yes
<omit>
root@(none):/# trcv-dev 0-47 txdis
Please execute following commands to disable it.
SFP_1[0]: no
SFP_2[1]: no
SFP_3[2]: no
SFP_4[3]: no
SFP_5[4]: no
SFP_6[5]: no
SFP_7[6]: no
SFP_8[7]: no
SFP_9[8]: no
SFP_10[9]: no
SFP_11[10]: no
<omit>
root@(none):/# trcv-dev 0-47 txdis 0
root@(none):/# i2cset -y 1 0x77 0x02
root@(none):/# i2cset -y 1 0x62 0x0c 0x00
root@(none):/# i2cset -y 1 0x62 0x0d 0x00After that, please check the port status if it will link up or not.
root@(none):/# swutil ps
ena/ speed/ link auto STP lrn inter max cut loop
port link Lns duplex scan neg? state pause discrd ops face frame thru? back encap
xe0( 1) up 1 10G FD SW No Forward TX RX None FA XFI 9412 No IEEE
xe1( 2) up 1 10G FD SW No Forward TX RX None FA XFI 9412 No IEEE
xe2( 3) down 1 10G FD SW No Forward TX RX None FA XFI 9412 No IEEE
xe3( 4) down 1 10G FD SW No Forward TX RX None FA XFI 9412 No IEEE
xe4( 5) down 1 10G FD SW No Forward TX RX None FA XFI 9412 No IEEE
xe5( 6) down 1 10G FD SW No Forward TX RX None FA XFI 9412 No IEEE
<omit> - Regarding the QSFP28 100G port, please check "QSFP RESET state" and "LPmode" (Low Power mode) settings. (By default, the setting is reset state and high power mode.)
Use the below command to set all QSFP28 ports to "normal state".
root@(none):/# i2cdetect -y 1
In the meanwhile, please make sure the below LPmode setting is 0xc0 (At high power mode).
root@(none):/# i2cset -y 1 0x77 0 0x02
root@(none):/# i2cset -y 1 0x62 0x15 0x3f
root@(none):/# i2cdetect -y 1
If the value is not 0xc0, please execute
root@(none):/# i2cset -y 1 0x77 0 0x02
root@(none):/# i2cget -y 1 0x62 0x16
0xc0i2cset -y 1 0x62 0x16 0xc0
.
After that, please check the port49 and port50 status if it will link up or not.
root@(none):/# swutil ps
ena/ speed/ link auto STP lrn inter max cut loop
port link Lns duplex scan neg? state pause discrd ops face frame thru? back encap
ce0( 27) up 4 100G FD SW No Forward TX RX None FA CAUI4 9412 No IEEE
ce1( 25) up 4 100G FD SW No Forward TX RX None FA CAUI4 9412 No IEEE
If the above items are checked, but the ports still cannot be linked up, please save all logs of the above test and submit the ticket to Edgecore Support.
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