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AS9716-32D - Switch port link problems Follow

Purpose :

This article describes how to check the hardware portion for troubleshooting switch ports cannot link up problems.

Model :

AS9716-32D

Procedure :

Step-1 Please make sure the cables/transceivers are working fine

Step-2 Please power cycle the switch and boot into ACCTON-DIAG for troubleshooting

Step-3 Enter the command to set port speed

Set port speed to 400G.

root@(none):/# swutil -C -s
root@(none):/# swutil -C -r 32x400G
switch config mode: 32x400G

If you want to test with port speeds 100G, please execute "swutil -C -r 32x100G".

Step-4 Setup the environment for specific ports

For example:

Use a pair of 400G transceivers to connect port1 and port2.
Use a pair of 10G transceivers to connect the 10G ports.

Step-5 Check port status with command lines

Basically, the ports will link up by plugging the cables and transceivers. No additional settings are required.

The port mapping as below :

cd0~cd31 are physical port1~port32
xe0~xe1 are two 10G ports

root@(none):/# swutil ps
                 ena/        speed/ link auto    STP                  lrn  inter   max   cut             loop
           port  link  Lns   duplex scan neg?   state   pause  discrd ops   face frame  thru?    FEC     back
       cd0( 40)  up     8  400G  FD   SW  No   Forward  TX RX   None   FA    CR8  9412    No  RS544-2xN
       cd1( 41)  up     8  400G  FD   SW  No   Forward  TX RX   None   FA    CR8  9412    No  RS544-2xN
       cd2( 42)  down   8  400G  FD   SW  No   Forward  TX RX   None   FA    CR8  9412    No  RS544-2xN
       cd3( 43)  down   8  400G  FD   SW  No   Forward  TX RX   None   FA    CR8  9412    No  RS544-2xN
....(omitted)....
       xe0( 38)  up     1   10G  FD   SW  No   Forward  TX RX   None   FA    XFI  9412    No       NONE
       xe1(118)  up     1   10G  FD   SW  No   Forward  TX RX   None   FA    XFI  9412    No       NONE

If the fiber ports CANNOT link up, please refer to step-6 for debugging.

Step-6 Check the fiber port

There are three items need to be checked here.

Check if device reads the QSFP-DD transceiver
Please use the command "qsfp" to read the transceivers on the ports you are using.
*The EEPROM Summary shows a total of 32 fiber ports. Port 34 and 35 are the 10G ports.
*The ports showing [OK] means there is a transceiver detected in this port. Please check if your testing ports are shown as [OK].
*This test will check all the 32+2 ports.

root@(none):/# qsfp
QSFP Transceiver Test ..............
Detect 0x50:72-0x1      [OK]
Detect 0x50:72-0x2      [OK]
Detect 0x50:72-0x4      [Failed]
       ->Valid chip addresses: 04 26 28 42 46 47 57 65 72 73 74 75 76 77
Detect 0x50:72-0x8      [Failed]
       ->Valid chip addresses: 04 26 28 42 46 47 57 65 72 73 74 75 76 77
....(omitted)....
Detect 0x50:76-0x1      [OK]
Detect 0x50:76-0x2      [OK]

+================+
| EEPROM Summary |
+==============================================+
|     0x72 |      0x73 |      0x74 |      0x75 |
|----------------------------------------------|
| 1   [OK] |  9 [Fail] | 17 [Fail] | 25 [Fail] |
| 2   [OK] | 10 [Fail] | 18 [Fail] | 26 [Fail] |
| 3 [Fail] | 11 [Fail] | 19 [Fail] | 27 [Fail] |
| 4 [Fail] | 12 [Fail] | 20 [Fail] | 28 [Fail] |
| 5 [Fail] | 13 [Fail] | 21 [Fail] | 29 [Fail] |
| 6 [Fail] | 14 [Fail] | 22 [Fail] | 30 [Fail] |
| 7 [Fail] | 15 [Fail] | 23 [Fail] | 31 [Fail] |
| 8 [Fail] | 16 [Fail] | 24 [Fail] | 32 [Fail] |
+===============================================+
|     0x76 |
|----------|
| 34  [OK] |
| 35  [OK] |
+==========+
QSFP Transceiver Test: FAIL

Check the "pre-emphasis" and "link training"
If you are using optical transceivers or AOC cable, no additional settings are required. DIAG will load the "pre-emphasis" for them accordingly.
If you are using the DAC cable, please enable the "link training" function.
The following command is used to enable the "link training" function, take 400G ports for example:
```
root@(none):/# swutil phy control cd LT=1
Current PHY control settings of cd0 ->
Preemphasis = 0xa800
DriverCurrent = 0xffffffff
DFE ENable = True
LP DFE ENable = False
BR DFE ENable = False
LinkTraining Enable = True
....(omitted)....
```
For 100G ports, please execute "swutil phy control ce LT=1".

Regarding the LP mode(Low Power mode) of the QSFP28 100G port, in AS9716-32D design, the default is always in high power mode.
If the optical module still cannot be linked up, please try with another QSFP.
Regarding the last 10G port, AS9716-32D doesn't support MAC to CPU (Intel CPU D-1518 does not support the 10G KR interface.), but supports MAC to front ports.
In our ACCTON-DIAG, no additional settings are required, it will be linked by default.

If all the above items are checked, but the fiber port still cannot link up, please save all logs of the above test and submit the ticket to Edgecore Support.

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Category

AS9716-32D - Switch port link problems Follow

Purpose :

Model :

Procedure :

Comments

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Edgecore Networks Corporation

END USER LICENSE AGREEMENT

1) Trademarks:

2) License grant:

3) Open Source Software:

4) Ownership and Copyright:

5) Unauthorized Use:

6) No Warranties:

7) Limited Liability:

8) Compliance with laws:

9) Termination:

10) Governing Law and Jurisdiction:

11) General:

Broadcom License Agreement

LICENSE AGREEMENT

Definition

License

Restrictions

Termination

No Support

No Warranty / Disclaimer

Exclusion of Incidental, Consequential and Certain Other Damages

Limitation of Liability and Remedies

Confidentiality

Export Regulations

Non-Assignability

Government Customers

Miscellaneous

Category

Purpose :

Model :

Procedure :

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